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| Manufacturer | Renesas Electronics |
|---|---|
| Manufacturer's Part Number | UPD30311R-25 |
| Description | MATH PROCESSOR, COPROCESSOR; Terminal Form: PIN/PEG; No. of Terminals: 84; Package Code: PGA; Package Shape: SQUARE; Terminal Finish: Tin/Lead (Sn/Pb); |
| Datasheet | UPD30311R-25 Datasheet |
| NAME | DESCRIPTION |
|---|---|
| Minimum Supply Voltage: | 4.75 V |
| Package Body Material: | CERAMIC |
| Nominal Supply Voltage: | 5 V |
| Sub-Category: | Math Processors |
| Surface Mount: | NO |
| Terminal Finish: | Tin/Lead (Sn/Pb) |
| No. of Terminals: | 84 |
| Terminal Position: | PERPENDICULAR |
| Package Style (Meter): | GRID ARRAY |
| Address Bus Width: | 0 |
| Technology: | CMOS |
| JESD-30 Code: | S-XPGA-P84 |
| Maximum Clock Frequency: | 25 MHz |
| Package Shape: | SQUARE |
| Terminal Form: | PIN/PEG |
| Package Code: | PGA |
| Peripheral IC Type: | MATH PROCESSOR, COPROCESSOR |
| Maximum Supply Voltage: | 5.25 V |
| Boundary Scan: | NO |
| External Data Bus Width: | 0 |
| JESD-609 Code: | e0 |
| Qualification: | Not Qualified |
| Package Equivalence Code: | PGA84,12X12 |
| Terminal Pitch: | 2.54 mm |
| Power Supplies (V): | 5 |
